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Question 82

In a positive edge triggered Jk flip-flop, a low J and a low K produces :

  1. ANo change
  2. BLow state
  3. CHigh state
  4. DToggle state
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Correct answer: (A) No change

Explanation

In a JK flip-flop, J = 0 and K = 0 is the hold condition, so the output does not change at the clock edge.

From DSSSB TGT Computer Science Practice Set 4

This is question 82 of DSSSB TGT Computer Science Practice Set 4. See all questions of this paper with answers, or attempt the paper as a timed online test to get your score and all-India rank.