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Question 44Asked in UGC NET Computer Science, August 2016 (Paper II & III, Selected Questions)

The register that stores the bits required to mask the interrupts is

  1. AStatus register
  2. BInterrupt service register
  3. CInterrupt mask register
  4. DInterrupt request register
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Correct answer: (C) Interrupt mask register

Explanation

Interrupt Mask Register (IMR): An Interrupt mask register is a specialized register in a computer's CPU or a dedicated peripheral used to enable or disable (mask) individual interrupt lines.

From UGC NET Computer Science PYQ, August 2016 (Paper II & III, Selected Questions)

This is question 44 of UGC NET Computer Science PYQ, August 2016 (Paper II & III, Selected Questions). See all questions of this paper with answers, or attempt the paper as a timed online test to get your score and all-India rank.