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Question 194Asked in CIL MT Systems, 26 Mar 2017 (12:30 PM)

Consider a memory unit of size 96 K × 16, where the first component represents the total number of words and the second component represents the number of…

Consider a memory unit of size 96 K × 16, where the first component represents the total number of words and the second component represents the number of bits per word. What will be the number of address lines and input-output data lines?
  1. A16 address lines, 7 data lines
  2. B7 address lines, 16 data lines
  3. C17 address lines, 16 data lines
  4. D16 address lines, 17 data lines
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Correct answer: (C) 17 address lines, 16 data lines

From CIL MT Systems PYQ, 26 Mar 2017 (12:30 PM)

This is question 194 of CIL MT Systems PYQ, 26 Mar 2017 (12:30 PM). See all questions of this paper with answers, or attempt the paper as a timed online test to get your score and all-India rank.