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Question 114

A 4-bit ripple counter uses flip-flops with 10 ns propagation delay each. The maximum clock frequency is about:

  1. A25 MHz
  2. B40 MHz
  3. C100 MHz
  4. D10 MHz
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Correct answer: (A) 25 MHz

Explanation

Total delay 4 × 10 = 40 ns → 1/40 ns = 25 MHz.

From DSSSB TGT Computer Science Full Mock Test 4

This is question 114 of DSSSB TGT Computer Science Full Mock Test 4. See all questions of this paper with answers, or attempt the paper as a timed online test to get your score and all-India rank.