Computer Organization & Architecture Previous Year Questions
63 Computer Organization & Architecture (Computer Science) questions asked in DSSSB TGT / PGT previous year papers, each with the correct answer and explanation. Read them free on UTpaper, or attempt the full papers as timed online tests.
A transient of 100 ms is to be captured on a digital storage oscilloscope on full screen in the horizontal direction. If the transient is to be recorded at a sampling rate of 100 KS/s, what should the minimum size of the acqisition memory be ?
A5K
B10K
C15K
D20K
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Correct answer: (B) 10K
Explanation
Samples needed = sampling rate × time = 100,000 per second × 0.1 s = 10,000 samples, so the acquisition memory must hold at least 10K.
______ is the first Intel x86 microprocessor with a dual core, referring to the implementation of two processors on a single chip.
ACore
BCore 2 duo
CDual core
DCentrino
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Correct answer: (A) Core
Explanation
Following Stallings' list of Intel processors, the Intel Core was the first x86 microprocessor with a dual core, meaning two processors on a single chip. Core 2 Duo came later.
______ refers to the amount of time required to position the read – write head of a hard disk on appropriate sector.
ALoad time
BSeek time
CAccess time
DRotational latency
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Correct answer: (B) Seek time
Explanation
Seek time is the time to move the read/write head to the correct track. Rotational latency is the wait for the sector to rotate under the head, and access time is the two combined.
The following data refer to a hard disk: number of tracks per side = 600; number of sides = 2 ; number of bytes per sector = 512; storage capacity in bytes = 21 504 000. Determine the number of sectors per track for this hard disk.
A35
B40
C45
D50
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Correct answer: (A) 35
Explanation
Capacity = tracks per side × sides × sectors per track × bytes per sector. So sectors per track = 21,504,000 ÷ (600 × 2 × 512) = 21,504,000 ÷ 614,400 = 35.
Which of the following is not a program control instruction ?
ACMP
BMOV
CJMP
DCALL
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Correct answer: (B) MOV
Explanation
MOV is a data transfer instruction. JMP and CALL change the flow of control, and CMP is used with jumps to make decisions, so these are program control instructions.
On which of the following storage media, storage of information is organized as a single continuous spiral groove ?
ACD-ROM
BRAM
CHard disk
DFloppy disk
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Correct answer: (A) CD-ROM
Explanation
A CD-ROM stores data as pits along one continuous spiral track running from the centre outward, while hard disks and floppy disks use concentric circular tracks.
The technology that stores only the essential instructions on a microprocessors chip and thus enhances its speed is referred to as :
AMIMD
BCISC
CRISC
DSIMD
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Correct answer: (C) RISC
Explanation
RISC (Reduced Instruction Set Computer) keeps only a small set of simple, essential instructions that run in about one clock cycle each, which increases speed. CISC uses many complex instructions.
In a computer system, memory mapped access takes 100 nanoseconds when a page is found in TLB. In case the page is not TLB, it takes 400 nanoseconds to access. Assuming a hit ratio of 80%, the effective access time is:
Which of the following is/are wrong?
(A) RAM and ROM are volatile memories,
(B) ROMs, PROMs and EPROMs are non-volatile memories.
(C) RAM and Dynamic RAM are same.
(D) A Random Access Memory (RAM) is a read write memory.
A(A) and (B)
B(A) and (C)
C(A) and (D)
D(C) and (D)
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Correct answer: (B) (A) and (C)
Explanation
(A) is wrong because ROM is non-volatile. (C) is wrong because RAM includes both static and dynamic RAM. (B) and (D) are true.
Ram and sita's father brought toys for them. Individually (by default) he gifted the boy an airplane. Which feature of social culture is highlighted in the statement?
AMarginalization
BEquality
CFeminism
DStereotype
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Correct answer: (D) Stereotype
Explanation
Automatically giving the boy an airplane, a toy assumed to be "for boys", reflects a gender stereotype.
Match the following.
I. Batch Processing system — A. Meeting time constraint
II. Multi Programming — B. Good response time
III. Time sharing — C. Resource utilization
IV. Real time — D. CPU idle time
Ai-D, ii-C, iii-B, iv-A
Bi-A, ii-B, iii-C, iv-D
Ci-D, ii-A, iii-B, iv-C
Di-B, ii-C, iii-D, iv-A
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Correct answer: (C) i-D, ii-A, iii-B, iv-C
Explanation
Note: the answer key gives (C), but the logical match is (A): batch processing leaves the CPU idle during I/O, multiprogramming improves resource utilization, time sharing gives good response time, and real-time systems must meet time constraints.
A free list contains three memory areas of sizes 6 KB, 15 KB and 12 KB. The next three memory requests are for 10 KB, 2 KB and 14 KB. Which of the memory allocation strategy that would be able to accommodate all the three requests?
AWorst Fit
BBest Fit
CNext Fit
DFirst Fit
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Correct answer: (B) Best Fit
Explanation
Best fit: 10 KB→12 KB (2 KB left), 2 KB→the 2 KB hole, 14 KB→15 KB, so all three fit. First, next and worst fit put 10 KB into the 15 KB block, leaving no block for 14 KB.
________ and ________ are planned and organized for improving the power of thinking.
ACurriculum; instructions
BCharts; teaching
CTeaching; instruction
DEvaluation; instructions
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Correct answer: (C) Teaching; instruction
Explanation
Teaching and instruction are planned and organised activities meant to develop learners' thinking power.
Q27DSSSB TGT Computer Science (Technical), 8 Aug 2021, Shift 2
How many address lines and input-output data are needed for the 64k ×8 memory unit?
A16 address line, 3 data line
B6 address line, 3 data line
C16 address line, 8 data line
D10 address line, 8 data line
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Correct answer: (C) 16 address line, 8 data line
Explanation
64K = 2¹⁶ words, so 16 address lines are needed. Each word is 8 bits wide, so 8 data lines are needed.
Q28DSSSB TGT Computer Science (Technical), 8 Aug 2021, Shift 2
How many memory references are to fetch an operand in indirect addressing?
A1
B2
C3
D4
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Correct answer: (B) 2
Explanation
In indirect addressing, the first memory access reads the operand's effective address and the second fetches the operand itself. That is 2 memory references.
Q29DSSSB TGT Computer Science (Technical), 8 Aug 2021, Shift 2
This instruction is of what type?
ADD R1, A, B
AZero address Instruction
BTwo address Instruction
COne address Instruction
DThree address Instruction
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Correct answer: (D) Three address Instruction
Explanation
ADD R1, A, B names three operands, a destination R1 and two sources A and B (R1 ← A + B), so it is a three-address instruction.
Q30DSSSB TGT Computer Science (Technical), 7 Aug 2021, Shift 3
How many address lines and input-output data lines are needed in 2k × 16 memory unit?
A10 address line, 16 data line
B10 address line, 4 data line
C11 address line, 4 data line
D11 address line, 16 data line
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Correct answer: (D) 11 address line, 16 data line
Explanation
2K = 2048 = 2¹¹ words, so 11 address lines are needed, and each word is 16 bits, so 16 data lines.
Q31DSSSB TGT Computer Science (Technical), 7 Aug 2021, Shift 3
Pseudo instruction is given to ________.
ACompiler
BLinker
CAssembler
DLoader
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Correct answer: (C) Assembler
Explanation
Pseudo-instructions (assembler directives such as ORG, END, DEC) are commands to the assembler. They are not translated into machine instructions.
Q32DSSSB TGT Computer Science (Technical), 7 Aug 2021, Shift 2
A 500 kbyte memory is managed using variable memory partitions and are allowed for compaction. It is currently 2 partitions of sizes 100 kbytes and 130 kbytes respectively. The smallest allocation request in Kbytes that could be denied is for ________.
A250
B270
C271
D170
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Correct answer: (C) 271
Explanation
Free memory = 500 − (100 + 130) = 270 KB. With compaction, all of it can be joined into one block, so any request up to 270 KB succeeds and the smallest request that can be denied is 271 KB.
Q33DSSSB TGT Computer Science (Technical), 7 Aug 2021, Shift 2
________ is CPU independent machine language style instruction set into which .NET Framework program are compiled.
AMachine Language
BHigh Level Language
CIntermediate Language
DAssembly Language
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Correct answer: (C) Intermediate Language
Explanation
.NET programs are compiled to Intermediate Language (MSIL/CIL), a CPU-independent instruction set that the JIT compiler later turns into native code.
Q34DSSSB TGT Computer Science (Technical), 1 Aug 2021, Shift 3
When there is a memory wastage within the memory partition itself then it is known as ________.
AExternal fragmentation
BInternal fragmentation
CBelady's Anomaly
DCompaction
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Correct answer: (B) Internal fragmentation
Explanation
Internal fragmentation is wasted space inside an allocated partition, when the partition is larger than the process placed in it.
Q35DSSSB TGT Computer Science (Technical), 1 Aug 2021, Shift 1
Disabling an interrupt is known as ________.
AMasking
BRun
CStop
DHalt
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Correct answer: (A) Masking
Explanation
Disabling (masking) an interrupt means setting a mask bit so the CPU ignores that interrupt until it is unmasked.
Which of the following systems typically DO NOT use contiguous allocation?
ACD-ROM systems
BVideo streaming systems
CGeneral-purpose operating systems with dynamic file sizes
DReal-time systems
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Correct answer: (C) General-purpose operating systems with dynamic file sizes
Explanation
General-purpose OSs have files that grow and shrink, which causes external fragmentation with contiguous allocation. So they use linked or indexed allocation instead.
Which of the following is a type of ROM that allows data to be written and erased electrically?
AEPROM
BEEPROM
CMask ROM
DFlash Memory
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Correct answer: (B) EEPROM
Explanation
EEPROM (Electrically Erasable Programmable ROM) can be written and erased with electrical signals. EPROM needs UV light to erase, and mask ROM is fixed at manufacture.
Which of the following statements regarding the Best Fit memory allocation strategy is
true?
ABest Fit may cause excessive fragmentation by creating many small unusable holes.
BBest Fit always allocates memory faster since it searches the larger free partition.
CBest Fit prefers allocating memory at the start of the memory block list.
DBest Fit merges adjacent free partitions soon after allocation.
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Correct answer: (A) Best Fit may cause excessive fragmentation by creating many small unusable holes.
Explanation
Best Fit chooses the smallest hole that fits, so the leftover pieces are tiny and often too small to use, causing external fragmentation. It also searches the entire list, so it is not faster.
In designing a microprogrammed control unit, what is stored in the control memory?
AAddressing modes for memory access
BMicroinstructions that define control signals
CMachine-level instructions
DData values used by the CPU
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Correct answer: (B) Microinstructions that define control signals
Explanation
In a microprogrammed control unit, the control memory (usually ROM) holds the microprograms, i.e. sequences of microinstructions whose bits generate the control signals.
Which of the following operations is NOT performed by the ALU?
ABitwise operations
BMemory addressing
CArithmetic operations
DLogical comparisons
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Correct answer: (B) Memory addressing
Explanation
The ALU performs arithmetic, logical, bitwise and comparison operations. Memory addressing is handled by the control unit and address registers/MMU, not the ALU.
In assembly, how is a macro invoked after its definition?
ABy using the JMP instruction
BBy using the CALL instruction
CBy writing its name followed by MACRO
DBy simply writing its name with any required parameters
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Correct answer: (D) By simply writing its name with any required parameters
Explanation
After defining a macro, you invoke it by writing its name (with any arguments) as if it were an instruction; the assembler then expands the macro body in place. CALL is for procedures, not macros.
Which component is considered the 'brain' of the computer?
AHDD
BRAM
CROM
DCPU
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Correct answer: (D) CPU
Explanation
The CPU processes all instructions and controls the other components, so it is called the brain of the computer. RAM, ROM and HDD are memory and storage.
How can curriculum content be gender-equitable for girls who are marginalised?
ABy only using native tongues when instructing
BBy only imparting advanced scientific knowledge
CBy pressuring girls to conform to gender norms
DBy providing literacy instruction that boosts self-esteem and changes people's lives
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Correct answer: (D) By providing literacy instruction that boosts self-esteem and changes people's lives
Explanation
A gender-equitable curriculum for marginalised girls gives literacy and life-skill education that builds self-esteem and empowers them to change their lives, rather than reinforcing gender norms.
The control unit directs the instruction cycle: it fetches each instruction, decodes it and generates the control signals that carry out its execution.
How to use these DSSSB TGT / PGT Computer Science questions
Every question here was asked in a real DSSSB TGT / PGT paper; the paper and shift are shown on the card, and the number opens the question on its own page. Try each one before tapping Show answer, then attempt the full DSSSB TGT / PGT papers as timed tests to check your speed under exam conditions.